On Mon, Jun 26, 2023 at 2:24 AM David Laight <David.Laight@xxxxxxxxxx> wrote: > > From: Yangyu Chen > > Sent: 24 June 2023 11:22 > > > > Hi, > > > > Thanks for doing this. > > > > On 6/24/23 6:20 AM, Evan Green wrote: > > > I don't have a machine where misaligned accesses are slow, but I'd be > > > interested to see the results of booting this series if someone did. > > > > I have tested your patches on a 100MHz BigCore rocket-chip with opensbi running on FPGA with > > 72bit(64bit+ECC) DDR3 1600MHz memory. As the rocket-chip did not support misaligned memory access, > > every misaligned memory access will trap and emulated by SBI. > > > > Here is the result: > ... > > ~ # dmesg | grep Unaligned > > [ 0.210140] cpu1: Unaligned word copy 0 MB/s, byte copy 38 MB/s, misaligned accesses are slow > > [ 0.410715] cpu0: Unaligned word copy 0 MB/s, byte copy 35 MB/s, misaligned accesses are slow > > How many misaligned cycles are in the test loop? > If emulated ones are that slow you pretty much only need to test one. The code does as many cycles as it can in a fixed number of jiffies. > > Also it is pretty clear that you really don't want to be emulating them. > If the emulation is hidden from the kernel that really doesn't help at all. >From what I understand there's work being done to give the kernel some awareness and even control over the misaligned access trapping/emulation. It won't help today's systems though, and either way you're right emulating is very very slow. -Evan
