Hi, Thanks for doing this. On 6/24/23 6:20 AM, Evan Green wrote: > I don't have a machine where misaligned accesses are slow, but I'd be > interested to see the results of booting this series if someone did. I have tested your patches on a 100MHz BigCore rocket-chip with opensbi running on FPGA with 72bit(64bit+ECC) DDR3 1600MHz memory. As the rocket-chip did not support misaligned memory access, every misaligned memory access will trap and emulated by SBI. Here is the result: ~ # cat /proc/cpuinfo processor : 0 hart : 0 isa : rv64imafdc mmu : sv39 uarch : sifive,rocket0 mvendorid : 0x0 marchid : 0x1 mimpid : 0x20181004 processor : 1 hart : 1 isa : rv64imafdc mmu : sv39 uarch : sifive,rocket0 mvendorid : 0x0 marchid : 0x1 mimpid : 0x20181004 ~ # dmesg | grep Unaligned [ 0.210140] cpu1: Unaligned word copy 0 MB/s, byte copy 38 MB/s, misaligned accesses are slow [ 0.410715] cpu0: Unaligned word copy 0 MB/s, byte copy 35 MB/s, misaligned accesses are slow Thanks, Yangyu Chen
