On Tue, Mar 14, 2023 at 11:32:17AM -0700, Evan Green wrote: > We have an implicit set of base behaviors that userspace depends on, > which are mostly defined in various ISA specifications. > > Co-developed-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > Signed-off-by: Evan Green <evan@xxxxxxxxxxxx> > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > @@ -125,6 +126,25 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > case RISCV_HWPROBE_KEY_MIMPID: > hwprobe_arch_id(pair, cpus); > break; > + /* > + * The kernel already assumes that the base single-letter ISA > + * extensions are supported on all harts, and only supports the > + * IMA base, so just cheat a bit here and tell that to > + * userspace. > + */ > + case RISCV_HWPROBE_KEY_BASE_BEHAVIOR: > + pair->value = RISCV_HWPROBE_BASE_BEHAVIOR_IMA; > + break; > + > + case RISCV_HWPROBE_KEY_IMA_EXT_0: > + pair->value = 0; > + if (has_fpu()) > + pair->value |= RISCV_HWPROBE_IMA_FD; > + > + if (elf_hwcap & RISCV_ISA_EXT_c) Random thought while reviewing another patch, and I kinda felt a bit stupid following the existing code to try and make sure, but should this become a call to riscv_isa_extension_available(NULL, c)? It may be nice to propagate that helper, if it works, than check the bit directly. Cheers, Conor. > + pair->value |= RISCV_HWPROBE_IMA_C; > + > + break; > > /* > * For forward compatibility, unknown keys don't fail the whole > -- > 2.25.1 >
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