>> + A multi-PMIC synchronization scheme is implemented in the PMIC device >> + to synchronize the power state changes with other PMIC devices. This is >> + accomplished through a SPMI bus: the primary PMIC is the controller >> + device on the SPMI bus, and the secondary PMICs are the target devices >> + on the SPMI bus. > >Is this a TI specific feature? > This implementation of SPMI bus is a TI specific feature and is only supported between devices which have this specific implementation.
