在2022年6月1日六月 上午10:59，Huacai Chen写道： > LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. > LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit > version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its > boot protocol LoongArch-specific interrupt controllers (similar to APIC) > are already added in the next revision of ACPI Specification (current > revision is 6.4). > I’ve been reviewing all LA changes in past week and now I’m giving out R-b for every patch I had reviewed in detail. (I don’t really now anything about mm and processes so I just leave them). I also tried to run the kernel on my machine with Huacai’s next tree and Xuerui’s BPI patch. I watched the “New World” of LoongArch grow up from scratch. And I must say it’s a epic work showing the collaboration between community and Loongson company. Especially Xuerui who invested numerous days and nights without any return. Thanks to all people involved. - Jiaxun
