On Mon, Apr 04, 2022 at 02:18:58PM -0700, Peter Collingbourne wrote: > + For CPUs with the Memory Tagging Extension feature: > + > + - If EL3 is present: > + > + - SCR_EL3.ATA (bit 26) must be initialised to 0b1. > + > + - If the kernel is entered at EL1 and EL2 is present: > + > + - HCR_EL2.ATA (bit 56) must be initialised to 0b1. Very nitpicky but this is only required for FEAT_MTE2 and above, plain FEAT_MTE doesn't have these traps. I don't know that this is a thing that anyone's actually implemented and from v8.7 on it's not permitted but the above isn't strictly true if someone did for some reason have the most basic version. Otherwise Reviewed-by: Mark Brown <broonie@xxxxxxxxxx>
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