Hi Mathieu, On Thu, Jan 27, 2022 at 01:22:20PM -0700, Mathieu Poirier wrote: > On Tue, Jan 25, 2022 at 07:50:30PM +0530, Anshuman Khandual wrote: > > Anshuman Khandual (7): > > arm64: Add Cortex-A510 CPU part definition > > arm64: errata: Add detection for TRBE ignored system register writes > > arm64: errata: Add detection for TRBE invalid prohibited states > > arm64: errata: Add detection for TRBE trace data corruption > > coresight: trbe: Work around the ignored system register writes > > coresight: trbe: Work around the invalid prohibited states > > coresight: trbe: Work around the trace data corruption > > > > Documentation/arm64/silicon-errata.rst | 6 + > > arch/arm64/Kconfig | 59 ++++++++++ > > arch/arm64/include/asm/cputype.h | 2 + > > arch/arm64/kernel/cpu_errata.c | 27 +++++ > > arch/arm64/tools/cpucaps | 3 + > > drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- > > drivers/hwtracing/coresight/coresight-trbe.h | 8 -- > > 7 files changed, 183 insertions(+), 36 deletions(-) > > I have applied this set and sent a pull request to Catalin for the arm64 > portion. Well, I'm happy for the whole series to go in via Greg's tree or however the coresight patches go in (that's why I acked them). The last three patches depend on the first four, so you might as well send them all together. I'd split the series only if there's a conflict with the arm64 tree (I haven't checked). -- Catalin
