From: Aurelien Jarno <aurelien@xxxxxxxxxxx> Enable the just added Rockchip RNG driver for RK356x SoCs. Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx> Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 7 +++++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index f1be76a54ceb..b9c6b2dc87fa 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -257,6 +257,13 @@ power-domain@RK3568_PD_PIPE { }; }; +&rng { + rockchip,sample-count = <1000>; + quality = <900>; + + status = "okay"; +}; + &usb_host0_xhci { phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; phy-names = "usb2-phy", "usb3-phy"; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 4690be841a1c..d160a23fd495 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1113,6 +1113,16 @@ sdhci: mmc@fe310000 { status = "disabled"; }; + rng: rng@fe388000 { + compatible = "rockchip,rk3568-rng"; + reg = <0x0 0xfe388000 0x0 0x4000>; + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; + clock-names = "core", "ahb"; + resets = <&cru SRST_TRNG_NS>; + reset-names = "reset"; + status = "disabled"; + }; + i2s0_8ch: i2s@fe400000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe400000 0x0 0x1000>; -- 2.45.2