Hi Sam, On Wed, 19 Jun 2024 at 02:15, Sam Protsenko <semen.protsenko@xxxxxxxxxx> wrote: > > Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be > enabled in order to access TRNG registers. Add and handle the optional > PCLK clock accordingly to make it possible. > > Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > --- > Changes in v2: > - Used devm_clk_get_optional_enabled() to avoid calling > clk_prepare_enable() for PCLK > Reviewed-by: Anand Moon <linux.amoon@xxxxxxxxx> Thanks -Anand
