On Mon, 30 May 2022 at 11:58, Yoan Picchi <yoan.picchi@xxxxxxxxxxxx> wrote: > > > On Wed, 18 May 2022 at 17:55, Andre Przywara <andre.przywara@xxxxxxx> > wrote: > > > > > > On Tue, 17 May 2022 10:11:09 +0200 > > > Ard Biesheuvel <ardb@xxxxxxxxxx> wrote: > > > > > > Hi, > > > > > > > On Mon, 16 May 2022 at 12:16, <yoan.picchi@xxxxxxx> wrote: > > > > > > > > > > From: Yoan Picchi <yoan.picchi@xxxxxxx> > > > > > > > > > > This dependency looks outdated. After the previous patch, we > have been able > > > > > to use this driver to encrypt some data and to create working > VF on arm64. > > > > > > > > > > Signed-off-by: Yoan Picchi <yoan.picchi@xxxxxxx> > > > > > > > > Are you sure the driver is safe for non-coherent DMA as well? > > > > > > That depends on your definition of "sure". > > > We indeed tested this only on a server with coherent PCIe. > > > > > > I skimmed through the driver, and it looks like to use the DMA API > > > correctly: > > > - I see dma_alloc_coherent() calls for DMA ring buffers. > > > - There are dma_map_single()/dma_unmap_single() pairs in other parts. > > > - Accesses to the BARs are capsuled via macros, using readl/writel. > > > - Access the the SRAM BAR is also only done via those macros. > > > > > > I didn't go through the driver systematically, and of course the > > > interesting parts are the ones you don't see easily, so I am eager > to hear > > > any other opinions on this topic. > > > > > > Ard, do you have anything special in mind? Is there something to > look out > > > for, specifically? > > > > > > > If it uses the DMA api consistently and correctly, and works as > > expected when running under a SMMU, things are probably fine > > > > > The few cards we have access to are in some server in the data > centre, so > > > I can't easily walk in with, say a RockPro64, and test this there. > > > > > > > I suppose this implies that you have tested with SMMUs enabled. > > Sorry for the delay, I was away for a few days. > Actually, our previous attempts were with the iommu set to passthrough, > but I > just tested without the passthrough and it works the same way. Thanks for confirming. So this looks fine to me as far as un-x86-like DMA topologies are concerned. I do agree that big-endian should be forbidden or tested thoroughly as well.
