Hi all,
On 1/31/2022 11:18 AM, Dave Hansen wrote:
On 1/31/22 10:43, Dey, Megha wrote:
With this implementation, we see a 1.5X improvement on ICX/ICL for 16KB
buffers compared to the existing kernel AES-GCM implementation that
works on 128-bit XMM registers.
What is your best guess about how future-proof this implementation is?
Will this be an ICL/ICX one-off? Or, will implementations using 256-bit
YMM registers continue to enjoy a frequency advantage over the 512-bit
implementations for a long time?
Dave,
This would not be an ICL/ICX one off. For the foreseeable future,
AVX512VL YMM implementations will enjoy a frequency advantage over
AVX512L ZMM implementations.
Although, over time, ZMM and YMM will converge when it comes to performance.
Herbert/Andy,
Could you please let us know if this approach is a viable one and would
be acceptable by the community?
Optimizing crypto algorithms using AVX512VL instructions gives a 1.5X
performance improvement over existing AES-GCM algorithm in the
kernel(using XMM registers) with no frequency drop.
Thanks,
Megha
