On 1/31/22 10:43, Dey, Megha wrote: > With this implementation, we see a 1.5X improvement on ICX/ICL for 16KB > buffers compared to the existing kernel AES-GCM implementation that > works on 128-bit XMM registers. What is your best guess about how future-proof this implementation is? Will this be an ICL/ICX one-off? Or, will implementations using 256-bit YMM registers continue to enjoy a frequency advantage over the 512-bit implementations for a long time?
