On Thu, Nov 18, 2021 at 04:07:50PM +0100, Nicolas Toromanoff wrote:
> STM32 CRYP hardware doesn't manage CTR counter bigger than max U32, as
> a workaround, at each block the current IV is saved, if the saved IV
> lower u32 is 0xFFFFFFFF, the full IV is manually incremented, and set
> in hardware.
> Fixes: bbb2832620ac ("crypto: stm32 - Fix sparse warnings")
>
> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@xxxxxxxxxxx>
> ---
> drivers/crypto/stm32/stm32-cryp.c | 25 ++++++++++++-------------
> 1 file changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c
> index 7b55ad6d2f1a..9d6ccf1eb4ce 100644
> --- a/drivers/crypto/stm32/stm32-cryp.c
> +++ b/drivers/crypto/stm32/stm32-cryp.c
> @@ -163,7 +163,7 @@ struct stm32_cryp {
> struct scatter_walk in_walk;
> struct scatter_walk out_walk;
>
> - u32 last_ctr[4];
> + __be32 last_ctr[4];
This introduces a sparse warning, please fix and resubmit.
Thanks,
--
Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
