The Intel Keem Bay SoC has an Offload Crypto Subsystem (OCS) featuring a Hashing Control Unit (HCU) for accelerating hashing operations. This driver adds support for such hardware thus enabling hardware-accelerated hashing on the Keem Bay SoC for the following algorithms: - sha224 and hmac(sha224) - sha256 and hmac(sha256) - sha384 and hmac(sha384) - sha512 and hmac(sha512) - sm3 and hmac(sm3) The driver is passing crypto manager self-tests, including the extra tests (CRYPTO_MANAGER_EXTRA_TESTS=y). v3 -> v4: - Addressed comments from Mark Gross. - Added Reviewed-by-tag from Rob Herring to DT binding patch. - Driver reworked to better separate the code interacting with the hardware from the code implementing the crypto ahash API. - Main patch split into 3 different patches to simplify review (patch series is now composed of 5 patches) v2 -> v3: - Fixed more issues with dt-bindings (removed useless descriptions for reg, interrupts, and clocks) v1 -> v2: - Fixed issues with dt-bindings Daniele Alessandrelli (3): crypto: keembay-ocs-hcu - Add HMAC support crypto: keembay-ocs-hcu - Add optional support for sha224 MAINTAINERS: Add maintainers for Keem Bay OCS HCU driver Declan Murphy (2): dt-bindings: crypto: Add Keem Bay OCS HCU bindings crypto: keembay - Add Keem Bay OCS HCU driver .../crypto/intel,keembay-ocs-hcu.yaml | 46 + MAINTAINERS | 11 + drivers/crypto/keembay/Kconfig | 29 + drivers/crypto/keembay/Makefile | 3 + drivers/crypto/keembay/keembay-ocs-hcu-core.c | 1264 +++++++++++++++++ drivers/crypto/keembay/ocs-hcu.c | 840 +++++++++++ drivers/crypto/keembay/ocs-hcu.h | 106 ++ 7 files changed, 2299 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml create mode 100644 drivers/crypto/keembay/keembay-ocs-hcu-core.c create mode 100644 drivers/crypto/keembay/ocs-hcu.c create mode 100644 drivers/crypto/keembay/ocs-hcu.h base-commit: 7bba37a1591369e2e506d599b8f5d7d0516b2dbc -- 2.26.2
