On 23. 01. 20 12:11, Kalyani Akula wrote: > Add documentation to describe Xilinx ZynqMP AES-GCM driver bindings. > > Signed-off-by: Kalyani Akula <kalyani.akula@xxxxxxxxxx> > --- > > V5 Changes: > - Moved dt-bindings patch from 1/4 to 2/4 > - Converted dt-bindings from .txt to .yaml format. > > .../bindings/crypto/xlnx,zynqmp-aes.yaml | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml > new file mode 100644 > index 0000000..b2bca4b > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml > @@ -0,0 +1,37 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings > + > +maintainers: > + - Kalyani Akula <kalyani.akula@xxxxxxxxxx> > + - Michal Simek <michal.simek@xxxxxxxxxx> > + > +description: | > + The ZynqMP AES-GCM hardened cryptographic accelerator is used to > + encrypt or decrypt the data with provided key and initialization vector. > + > +properties: > + compatible: > + const: xlnx,zynqmp-aes > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + firmware { > + zynqmp_firmware: zynqmp-firmware { > + compatible = "xlnx,zynqmp-firmware"; > + method = "smc"; > + xlnx_aes: zynqmp-aes { > + compatible = "xlnx,zynqmp-aes"; > + }; > + }; > + }; > +... > Rob: dtbs_check looks good to me. This binding is aligned with other clock, reset, pl binding coming to this node that's why Acked-by: Michal Simek <michal.simek@xxxxxxxxxx> Thanks, Michal
