Re: [PATCH V5 1/4] firmware: xilinx: Add ZynqMP aes API for AES functionality

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On 23. 01. 20 12:11, Kalyani Akula wrote:
> Add ZynqMP firmware AES API to perform encryption/decryption of given data.
> 
> Signed-off-by: Kalyani Akula <kalyani.akula@xxxxxxxxxx>
> ---
> 
> V5 Changes:
> - Moved firmware: xilinx: Add ZynqMP aes API for AES patch from 3/4 to 1/4
> - This patch (1/4) is based on below commit id because of possible merge conflict
>   commit 461011b1e1ab ("drivers: firmware: xilinx: Add support for feature check")  
> - Added newlines in between at the start and end of zynqmp_pm_aes_engine function
> 
>  drivers/firmware/xilinx/zynqmp.c     | 25 +++++++++++++++++++++++++
>  include/linux/firmware/xlnx-zynqmp.h |  2 ++
>  2 files changed, 27 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 0137bf3..20c084f 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -705,6 +705,30 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>  				   qos, ack, NULL);
>  }
>  
> +/**
> + * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
> + * AES-GCM core.
> + * @address:	Address of the AesParams structure.
> + * @out:	Returned output value
> + *
> + * Return:	Returns status, either success or error code.
> + */
> +static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
> +{
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	int ret;
> +
> +	if (!out)
> +		return -EINVAL;
> +
> +	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
> +				  lower_32_bits(address),
> +				  0, 0, ret_payload);
> +	*out = ret_payload[1];
> +
> +	return ret;
> +}
> +
>  static const struct zynqmp_eemi_ops eemi_ops = {
>  	.get_api_version = zynqmp_pm_get_api_version,
>  	.get_chipid = zynqmp_pm_get_chipid,
> @@ -728,6 +752,7 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>  	.set_requirement = zynqmp_pm_set_requirement,
>  	.fpga_load = zynqmp_pm_fpga_load,
>  	.fpga_get_status = zynqmp_pm_fpga_get_status,
> +	.aes = zynqmp_pm_aes_engine,
>  };
>  
>  /**
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index e72eccf..5455830 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -82,6 +82,7 @@ enum pm_api_id {
>  	PM_CLOCK_GETRATE,
>  	PM_CLOCK_SETPARENT,
>  	PM_CLOCK_GETPARENT,
> +	PM_SECURE_AES = 47,
>  	PM_FEATURE_CHECK = 63,
>  	PM_API_MAX,
>  };
> @@ -313,6 +314,7 @@ struct zynqmp_eemi_ops {
>  			       const u32 capabilities,
>  			       const u32 qos,
>  			       const enum zynqmp_pm_request_ack ack);
> +	int (*aes)(const u64 address, u32 *out);
>  };
>  
>  int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
> 

Acked-by: Michal Simek <michal.simek@xxxxxxxxxx>

Thanks,
Michal



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