The following patches increase/fix CAAM performance by modifying the configuration of MCFGR (Master Configuration Register): -1st patch fixes a ~ 5% performance drop on PPC platforms -2nd patch improves performance in some use cases, since CAAM DMA transfers are optimized Note: AWCACHE[0] (AXI3 "bufferable") and AWCACHE[1] (AXI3 "cacheable") are set irrespective of platform, since: -for ARM-based SoCs: the interconnect IP ignores AWCACHE[0] -for PPC-based SoCs: PAMU handles coherency control, not AWCACHE[1] Horia Geantă (2): crypto: caam - make write transactions bufferable on PPC platforms crypto: caam - enable LARGE_BURST for enhancing DMA transactions size drivers/crypto/caam/ctrl.c | 4 ++-- drivers/crypto/caam/regs.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) -- 2.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
