On 12.06.2023 17:12:55, Srinivas Goud wrote: > ECC feature added to Tx and Rx FIFO’s for Xilinx CAN Controller. > Part of this feature configuration and counter registers > added in IP for 1bit/2bit ECC errors. > Please find more details in PG096 v5.1 document. > > xlnx,has-ecc is optional property and added to Xilinx CAN > Controller node if ECC block enabled in the HW. > > Signed-off-by: Srinivas Goud <srinivas.goud@xxxxxxx> Is there a way to introspect the IP core to check if this feature is compiled in? Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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