Another failure, it looks similar: | do_rxif_analyze: ct=0x0a ch=0x0b cd=0x01 rt=0x000000fa rh=0x000000fb rd=0x01 | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0b ch=0x0c cd=0x01 rt=0x000000fb rh=0x000000fc rd=0x01 | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0c ch=0x0f cd=0x03 rt=0x000000fc rh=0x000000ff rd=0x03 | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0f ch=0x0e cd=0x0f rt=0x000000ff rh=0x0000010e rd=0x0f | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF x Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0e ch=0x0e cd=0x10 rt=0x0000010e rh=0x0000011e rd=0x10 | TFERFFIF x Receive FIFO Full Interrupt Flag | TFHRFHIF x Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0e ch=0x0f cd=0x01 rt=0x0000011e rh=0x0000011f rd=0x01 | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | -------------------------------------------------------------------------------- | do_rxif_analyze: ct=0x0f ch=0x00 cd=0x01 rt=0x0000011f rh=0x00000120 rd=0x01 | TFERFFIF Receive FIFO Full Interrupt Flag | TFHRFHIF Receive FIFO Half Full Interrupt Flag | TFNRFNIF x Receive FIFO Not Empty Interrupt Flag | BDIAG1: bdiag1(0x03c)=0x00000100 | DLCMM DLC Mismatch | ESI ESI flag of a received CAN FD message was set | DCRCERR Data CRC Error | DSTUFERR Data Bit Stuffing Error | DFORMERR Data Format Error | DBIT1ERR Data BIT1 Error | DBIT0ERR Data BIT0 Error | TXBOERR Device went to bus-off (and auto-recovered) | NCRCERR CRC Error | NSTUFERR Bit Stuffing Error | NFORMERR Format Error | NACKERR Transmitted message was not acknowledged | NBIT1ERR Bit1 Error | NBIT0ERR Bit0 Error | EFMSGCNT = 0x0100 Error Free Message Counter | TX-0 Object: 0x03 (0xaf8) | id = 0x000002a5 | flags = 0x0001fe08 | SEQ_MCP2517FD = 0x00007f Sequence (MCP2517) | SEQ_MCP2518FD = 0x0000ff Sequence (MCP2518) | data = 00 03 72 e4 78 54 d6 ed The correct message counter is 0x100, the wrong one 0x120. That's 2x FIFO size. I'd like to know when the FIFO head is wrong for the first time, one that results in a data transfer where "old" FIFO contents is read. I haven't dumped any data yet. Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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