> Alright, it looks like I had faulty hardware! I got a Waveshare CAN > FD hat and both the old waveshare-provided driver and the new > mcp251xfd driver work. > > Well, at least for can0 with mcp251xfd-spi0-0: > > [ 14.530587] CAN device driver interface > [ 14.548941] mcp251xfd spi0.0: DEBUG mcp251xfd mcp251xfd_probe(): > devm_clk_get() > [ 14.548977] mcp251xfd spi0.0: DEBUG mcp251xfd mcp251xfd_probe(): feq=40000000 > [ 14.549045] spi_master spi0: will run message pump with realtime priority > [ 14.562946] mcp251xfd spi0.0 can0: MCP2517FD rev0.0 (-RX_INT > +MAB_NO_WARN +CRC_REG +CRC_RX +CRC_TX +ECC -HD c:40.00MHz m:20.00MHz > r:17.00MHz e:0.00MHz) successfully initialized. > > However, I am still trying to figure out can1. I tried > mcp251xfd-spi0-1 and mcp251xfd-spi1-0 but neither was able to > initialize the device. I am using: > > commit 9e02abd4fe591b2d7f369cdaaaf8f1269b7c8693 (HEAD -> > v5.4-rpi/mcp251xfd-20201022-54, marc/v5.4-rpi/mcp251xfd-20201022-54) > Author: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> > Date: Fri Nov 15 00:54:07 2019 +0100 > > mcp251xfd-spi0-0, mcp251xfd-spi0-1, mcp251xfd-spi1-0: add overlays > > Signed-off-by: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> > > I'll try tweaking it a bit and see if I get any further. > > Thanks, > Drew > I believe Waveshare did choose other interrupt pins. Marc used 24 25 which I also chose for a pHat I'm currently making schematics for. Try these lines in /boot/config.txt dtoverlay=mcp251xfd-spi0-0,interrupt=25 dtoverlay=mcp251xfd-spi1-0,interrupt=16 The waveshare overlay is strange in one point. It uses Pin 26 (instead of 18) for Chip selection but that is no chip select pin. This can work if the pin is output and luckily pulls the CE line in the right direction. https://gist.github.com/pdp7/784d0ba8b9648d20ab055747ec945225#file-2xmcp2517fd-overlay-dts-L40 https://pinout.xyz/pinout/pin37_gpio26# Maybe this has something to do with Nvidia Jetson Platform. -- Patrick
