> On the transition from "TX ERROR_WARNING -> TX ERROR_ACTIVE" the > CERRIF > is not set. Mhm, do I misunderstand your point here? The Transition TX ERROR_WARNING -> TX ERROR_ACTIVE isn't covered by the CERRIF interrupt (which matches the documentation). The interrupt bit gets set on ERROR_Passive to ERROR_ACTIVE (TEC/REC goes from 128 to 127). At that transition I do see the CERRIF bit. It is correct and intended (though maybe not 100% intuitive) that going from ERROR_WARNING to ERROR_ACTIVE TEC/REC 96 to 95 CERRIF is NOT being set. Best Regards, Thomas
