Re: [PATCH v2] can: m_can: remove double clearing of clock stop request bit

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Sean

On 12/9/19 1:29 PM, Sean Nyekjaer wrote:
In m_can_config_endisable the CSR bit cleared 2 times while enabling
configuration mode.
The CSR should always be cleared when writing to the CCCR register.

According to the datasheet:
If a Read-Modify-Write operation is performed in Standby mode a
CSR = 1 will be read back but a 0 should be written to it.

I am not understanding why you need to have this statement in the commit message.

And are you referring to the Bosch IP data sheet or the TCAN data sheet?

If it is the TCAN data sheet then this reference may not apply to the MMIO version.

It would be best to denote which datasheet you are talking about here.

Other then that I agree with the change and will ACK once I understand what data sheet you are talking about.

Dan




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