In m_can_config_endisable the CSR bit cleared 2 times while enabling
configuration mode.
The CSR should always be cleared when writing to the CCCR register.
According to the datasheet:
If a Read-Modify-Write operation is performed in Standby mode a
CSR = 1 will be read back but a 0 should be written to it.
Signed-off-by: Sean Nyekjaer <sean@xxxxxxxxxx>
Acked-by: Sriram Dash <sriram.dash@xxxxxxxxxxx>
---
Changes since v1:
- Changed CSA -> CSR bit in the commit msg
drivers/net/can/m_can/m_can.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 02c5795b7393..4edc6f6e5165 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -380,10 +380,6 @@ void m_can_config_endisable(struct m_can_classdev *cdev, bool enable)
cccr &= ~CCCR_CSR;
if (enable) {
- /* Clear the Clock stop request if it was set */
- if (cccr & CCCR_CSR)
- cccr &= ~CCCR_CSR;
-
/* enable m_can configuration */
m_can_write(cdev, M_CAN_CCCR, cccr | CCCR_INIT);
udelay(5);
--
2.24.0
