Am 15.08.19 um 10:34 schrieb Marc Kleine-Budde: >> Now I have another really confusing problem. Anything I write to SPI is written little endian. The tcan chip expects big endian. >> Anything I read from SPI is treated as little endian but is big endian. Does anyone know why this happens? >> Is there a flag or something I can set for the SPI device/wire to fix this? > > Have you changed the bits_per_word to 8? Then you read just a stream of > bytes. If you tread them as an u32 they are in host order. > > Marc > Hi, from my experience with SPIDEV on RPI, the driver uses a char array for I/O. As the RPI code is build little endian, logically little endian comes out of SPI. You basically have to invert the bit and byte order by hand for a big endian slave. Clock Phase and Clock Polarity are also an issue on the RPI as at least SPIDEV kindly overlooks any options set previously. I had my share of this while writing a test app for a MAX31855 IC and ended up casting a little endian array to a big endian structure. Regards, Patrick
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