On Tue 30 Nov 23:29 PST 2021, Vinod Koul wrote:
> This add based DTSI for SM8450 SoC and includes base description of
> CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to
> shell with console on boards with this SoC
>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 476 +++++++++++++++++++++++++++
> 1 file changed, 476 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sm8450.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
[..]
> + qupv3_id_0: geniqup@9c0000 {
> + compatible = "qcom,geni-se-qup";
> + reg = <0x0 0x009c0000 0x0 0x2000>;
> + clock-names = "m-ahb", "s-ahb";
> + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
> + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + status = "disabled";
> +
> + uart7: serial@99c000 {
> + compatible = "qcom,geni-debug-uart";
There's nothing special about uart7 on a platform level, so my
suggestion is that you use the standard compatible of "qcom,geni-se-qup"
here and then override the compatible with "qcom,geni-debug-uart" in the
qrd.dts.
Regards,
Bjorn
