Re: [PATCH v3 2/2] phy: qcom: Introduce new eDP PHY driver

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On 21-10-21, 11:19, Bjorn Andersson wrote:
> On Thu 21 Oct 10:40 PDT 2021, Vinod Koul wrote:
> > On 16-10-21, 16:21, Bjorn Andersson wrote:

> > > +static int qcom_edp_configure_ssc(const struct qcom_edp *edp)
> > > +{
> > > +	const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts;
> > > +	u32 step1;
> > > +	u32 step2;
> > > +
> > > +	switch (dp_opts->link_rate) {
> > > +	case 1620:
> > > +	case 2700:
> > > +	case 8100:
> > > +		step1 = 0x45;
> > > +		step2 = 0x06;
> > > +		break;
> > 
> > line after each break please (here & few other places)
> 
> You mean an empty line between the break and the next case? That doesn't
> seem standard?

Yes that is not really a standard, but does improve readability a lot esp
when blocks are large

> > > +static int qcom_edp_dp_pixel_clk_determine_rate(struct clk_hw *hw,
> > > +						struct clk_rate_request *req)
> > > +{
> > > +	switch (req->rate) {
> > > +	case 1620000000UL / 2:
> > > +	case 2700000000UL / 2:
> > > +	/* 5.4 and 8.1 GHz are same link rate as 2.7GHz, i.e. div 4 and div 6 */
> > 
> > above rates are 1.62 and 2.7, where is 5.4 and 8.1... what am i missing?
> > 
> 
> As the comments says 2.7, 5.4 and 8.1 all has req->rate of 1350000000,
> with different dividers. But we're not allowed to "document" that by
> listing 2.7/2, 5.4/4 and 8.1/6 in the switch statement.

ok
-- 
~Vinod



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