On Thu, Sep 16, 2021 at 3:22 PM Satya Priya <skakit@xxxxxxxxxxxxxx> wrote:
> From: David Collins <collinsd@xxxxxxxxxxxxxx>
>
> pmic_gpio_child_to_parent_hwirq() and
> gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
> spmi-gpio irqspec to an SPMI controller irqspec. When they do
> this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
> peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
> This translation results in an incorrect irqspec for secondary
> PMICs that don't have a slave ID of 0 as well as for PMIC chips
> which have GPIO peripherals located at a base address other than
> 0xC000.
>
> Correct this issue by passing the slave ID of the pinctrl-spmi-
> gpio device's parent in the SPMI controller irqspec and by
> calculating the peripheral ID base from the device tree 'reg'
> property of the pinctrl-spmi-gpio device.
>
> Signed-off-by: David Collins <collinsd@xxxxxxxxxxxxxx>
> Signed-off-by: satya priya <skakit@xxxxxxxxxxxxxx>
> Fixes: ca69e2d165eb ("qcom: spmi-gpio: add support for hierarchical IRQ chip")
> Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Patch applied for fixes.
Is a similar patch needed for
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
?
Notice ssbi rather than sbmi...
Yours,
Linus Walleij
