Hi, On Tue, May 18, 2021 at 10:40 PM Stephen Boyd <swboyd@xxxxxxxxxxxx> wrote: > > This spi flash part is actually being clocked at 37.5MHz, not 25MHz, > because of the way the clk driver is rounding up the rate that is > requested to the nearest supported frequency. Let's update the frequency > here, and remove the TODO because this is the fastest frequency we're > going to be able to use here. > > Cc: Douglas Anderson <dianders@xxxxxxxxxxxx> > Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > index 24d293ef56d7..af3c0e1e2223 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > @@ -335,8 +335,7 @@ flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > > - /* TODO: Increase frequency after testing */ > - spi-max-frequency = <25000000>; > + spi-max-frequency = <37500000>; > spi-tx-bus-width = <2>; > spi-rx-bus-width = <2>; > }; Thanks. Looks right to me. I confirmed that the clock is 150 MHz in my "clk_summary" which is 4x 37.5. Reviewed-by: Douglas Anderson <dianders@xxxxxxxxxxxx> -Doug