On Fri, Nov 20, 2020 at 08:56:31AM +0000, Marc Zyngier wrote: > On 2020-11-20 04:30, Neeraj Upadhyay wrote: > > Hi, > > > > For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU) > > AA64PFR0[47:44] field is not set, and AMU does not get enabled for > > them. > > Can you please provide support for these CPUs in cpufeature.c? > > If that was the case, that'd be an erratum, and it would need to be > documented as such. It could also be that this is an optional feature > for these cores (though the TRM doesn't suggest that). > > Can someone at ARM confirm what is the expected behaviour of these CPUs? IIRC discussion with Ionela long back, we intentionally decided not to support IMPDEF(pre 8.4 non-architected so called AMUs) on the CPUs listed in $subject. -- Regards, Sudeep
