Hi, On Sat, Sep 12, 2020 at 6:09 PM Doug Anderson <dianders@xxxxxxxxxxxx> wrote: > > Hi, > > On Sat, Sep 12, 2020 at 3:54 PM Bjorn Andersson > <bjorn.andersson@xxxxxxxxxx> wrote: > > > > On Sat 12 Sep 16:08 CDT 2020, Douglas Anderson wrote: > > > > > When setting up a bidirectional transfer we need to program both the > > > TX and RX lengths. We don't need a memory barrier between those two > > > writes. Factor out the __iowmb() and use writel_relaxed(). This > > > saves a fraction of a microsecond of setup overhead on bidirectional > > > transfers. > > > > > > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> > > > --- > > > > > > drivers/spi/spi-geni-qcom.c | 13 ++++++++++--- > > > 1 file changed, 10 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c > > > index 92d88bf85a90..6c7e12b68bf0 100644 > > > --- a/drivers/spi/spi-geni-qcom.c > > > +++ b/drivers/spi/spi-geni-qcom.c > > > @@ -376,15 +376,22 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > > > len &= TRANS_LEN_MSK; > > > > > > mas->cur_xfer = xfer; > > > + > > > + /* > > > + * Factor out the __iowmb() so that we can use writel_relaxed() for > > > + * both writes below and thus only incur the overhead once even if > > > + * we execute both of them. > > > + */ > > > > How many passes through this function do we have to take before saving > > the amount of time it took me to read this comment? > > > > Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > > Thanks for the review! Yeah, in Chrome OS we do a crazy amount of SPI > transfers since our EC and security chip are connected over SPI and we > seem to pile a whole lot of stuff into the EC. This means we keep > coming back to the SPI controller again and again when profiling > things. I'm hoping that we'll eventually be able to get DMA enabled > here, but until then at least it's nice to make the FIFO transfers > better... Ugh. Given the problem that the kernel test robot found, I'm gonna say just drop this patch but keep the others I sent. As per the CL description, it's a pretty minor optimization and even though we do a lot of SPI transfers it's probably more worth it to work towards DMA mode than to try to find a cleaner solution for this one. -Doug
