On 08-05-20, 14:08, Ulf Hansson wrote: > + Lina > > On Thu, 7 May 2020 at 07:33, Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> wrote: > > > > On Wed 06 May 14:18 PDT 2020, Stephan Gerhold wrote: > > > > Viresh, Ulf, > > > > Stephan is trying to describe the relationship between the CPU rail and > > the memory rail on db410c (where the performance state of the memory > > rail needs to be kept above the performance state of the CPU supply. > > > > The latter is modelled as a power-domain and the performance state > > changes as expected, but no one enables the power-domain. > > Just to make one thing clear, from a genpd framework point of view, > power on/off of a genpd is orthogonal to setting/aggregating > performance states for it. > > It's instead up to the genpd provider to deal with this (as I > understand, that seems to be the issue from the below discussions). > > > > > What's the appropriate method for ensuring the power-domain is > > enabled/disabled as needed? Should it be referenced in the hierarchical > > power domain for the CPUs perhaps? > > If I understand the dependency correctly, perhaps you are right that > there needs to be a subdomain assigned. Although, I don't know if this > ever has been tested to work for a real use case, when it comes to > performance state propagations upwards in the hierarchy. > > Viresh? I have modeled that with a fake system, and yes it was tested. But not on real hardware but it should work nevertheless. -- viresh
