On 19-12-19, 18:08, Bjorn Andersson wrote:
> On Thu 19 Dec 07:04 PST 2019, Vinod Koul wrote:
>
> > If we do full reset of the phy, it seems to take a couple of ms to come
> > up on my system so increase the timeout to 10ms.
> >
> > This was found by full reset addition by commit 870b1279c7a0
> > ("scsi: ufs-qcom: Add reset control support for host controller") and
> > fixes the regression to platforms by this commit.
> >
> > Suggested-by: Can Guo <cang@xxxxxxxxxxxxxx>
> > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
>
> This does look familiar...
>
> https://lore.kernel.org/linux-arm-msm/20191107000917.1092409-3-bjorn.andersson@xxxxxxxxxx/
>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > index 091e20303a14..c2e800a3825a 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > @@ -66,7 +66,7 @@
> > /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */
> > #define CLAMP_EN BIT(0) /* enables i/o clamp_n */
> >
> > -#define PHY_INIT_COMPLETE_TIMEOUT 1000
> > +#define PHY_INIT_COMPLETE_TIMEOUT 100000
>
> 100ms seems a little bit excessive, and we do end up waiting this long
> when we have PCIe links without an attached device...
>
> Do you need >10ms or could we just have my patch merged?
Yeah I quick tested 10ms as well and seems good for me, so either ways
if fine, but lets get it applied quickly :-)
--
~Vinod
