On Sat 21 Sep 03:12 PDT 2019, kholk11@xxxxxxxxx wrote:
> From: "Angelo G. Del Regno" <kholk11@xxxxxxxxx>
>
> Add the pinctrl driver to support pin configuration with the
> pinctrl framework on MSM8976, MSM8956, APQ8056, APQ8076.
>
> Signed-off-by: Angelo G. Del Regno <kholk11@xxxxxxxxx>
> ---
> .../bindings/pinctrl/qcom,msm8976-pinctrl.txt | 183 +++
> drivers/pinctrl/qcom/Kconfig | 10 +
> drivers/pinctrl/qcom/Makefile | 1 +
> drivers/pinctrl/qcom/pinctrl-msm8976.c | 1128 +++++++++++++++++
> 4 files changed, 1322 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt
> create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8976.c
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt
> new file mode 100644
> index 000000000000..4e944f84b7d7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt
> @@ -0,0 +1,183 @@
> +Qualcomm MSM8976 TLMM block
As Linus indicated, please send your the DT bindings in separate
patches.
> +
[..]
> +Example:
> +
> + tlmm: pinctrl@1000000 {
> + compatible = "qcom,msm8976-pinctrl";
> + reg = <0x1000000 0x300000>;
> + interrupts = <0 208 0>;
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&tlmm 0 0 145>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + blsp1_uart2_active: blsp1_uart2_active {
> + mux {
> + pins = "gpio4", "gpio5", "gpio6", "gpio7";
> + function = "blsp_uart2";
> + };
> +
> + config {
> + pins = "gpio4", "gpio5", "gpio6", "gpio7";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> + };
> diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
[..]
> +static struct platform_driver msm8976_pinctrl_driver = {
> + .driver = {
> + .name = "msm8976-pinctrl",
> + .owner = THIS_MODULE,
No need to specify .onwer on platform_drivers anymore.
Apart from that, I think this patch looks good.
Regards,
Bjorn
