On Thu, May 9, 2019 at 9:06 AM Marc Gonzalez <marc.w.gonzalez@xxxxxxx> wrote:
>
> On 07/05/2019 20:02, Jordan Crouse wrote:
>
> > When we move to 64 bit addressing for a5xx and a6xx targets we will start
> > seeing pagefaults at larger addresses so format them appropriately in the
> > log message for easier debugging.
> >
> > Signed-off-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx>
> > ---
> >
> > drivers/gpu/drm/msm/msm_iommu.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> > index 12bb54c..1926329 100644
> > --- a/drivers/gpu/drm/msm/msm_iommu.c
> > +++ b/drivers/gpu/drm/msm/msm_iommu.c
> > @@ -30,7 +30,7 @@ static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,
> > struct msm_iommu *iommu = arg;
> > if (iommu->base.handler)
> > return iommu->base.handler(iommu->base.arg, iova, flags);
> > - pr_warn_ratelimited("*** fault: iova=%08lx, flags=%d\n", iova, flags);
> > + pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags);
>
> Why no leading 0 for 64-bit numbers?
>
> Will 32-bit platforms always get 8 useless characters?
>
well, they should be 0's, rather than garbage, if that was the
question. I'm not sure how many hoops it is worth jumping thru to
handle the diff between 32b GPU (<= a4xx) and 64b (>= a5xx). Even on
newer devices, the display is still 32b iova.
I guess this is *mostly* useful for debugging mesa (or at least I
guess I'm the one who triggers the most iommu faults).. so maybe not
worth caring about?
BR,
-R
