On 07/12/2018 09:57, Marc Gonzalez wrote:
> On 06/12/2018 17:45, Evan Green wrote:
>
>> I'll throw my random thought into the hopper here. With one particular
>> brand of UFS part on SDM845 we needed to make sure we banged on the
>> ufs_reset pin before the device would re-initialize fully. My hunch
>> says this is not your issue, but it can't hurt to make sure this is
>> happening.
>
> First of all, thanks for chiming in. I feel I'm close to making this work.
>
> My UFSHC DT node defines:
>
> resets = <&gcc GCC_UFS_BCR>;
> reset-names = "rst";
>
> If I'm not mistaken, the uhfhc driver should tickle the reset register?
> Is the ufs_reset pin something different?
In fact, I based my UFS stuff on your UFS stuff.
[PATCH v5 0/5] arm64: dts: qcom: sdm845: Add UFS DT nodes
I read the comments in that series, including the fact that the "resets"
property is ignored by the ufshc driver.
Grepping for ufs_reset downstream, I see:
$ git grep -i ufs_reset vendor
vendor:arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi: pins = "ufs_reset";
vendor:arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi: * UFS_RESET driver strengths are having
vendor:arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi: * HDRV value | UFS_RESET | Typical GPIO
vendor:arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi: * POR value for UFS_RESET HDRV is 3 which means
vendor:arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi: pins = "ufs_reset";
vendor:arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi: pins = "ufs_reset";
vendor:arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi: * UFS_RESET driver strengths are having
vendor:arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi: * HDRV value | UFS_RESET | Typical GPIO
vendor:arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi: * POR value for UFS_RESET HDRV is 3 which means
vendor:arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi: pins = "ufs_reset";
vendor:drivers/phy/phy-qcom-ufs-qrbtc-v2.c: writel_relaxed(0x15f, qrbtc_phy->u11_regs + U11_UFS_RESET_REG_OFFSET);
vendor:drivers/phy/phy-qcom-ufs-qrbtc-v2.c: writel_relaxed(0x0, qrbtc_phy->u11_regs + U11_UFS_RESET_REG_OFFSET);
vendor:drivers/phy/phy-qcom-ufs-qrbtc-v2.h:#define U11_UFS_RESET_REG_OFFSET PHY_USR(0x4)
vendor:drivers/pinctrl/qcom/pinctrl-msm8998.c:#define UFS_RESET(pg_name, offset) \
vendor:drivers/pinctrl/qcom/pinctrl-msm8998.c: PINCTRL_PIN(153, "UFS_RESET"),
vendor:drivers/pinctrl/qcom/pinctrl-msm8998.c:static const unsigned int ufs_reset_pins[] = { 153 };
vendor:drivers/pinctrl/qcom/pinctrl-msm8998.c: UFS_RESET(ufs_reset, 0x19d000),
Upstream:
$ git grep -i ufs_reset master
master:Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt: ufs_reset
master:Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt: ufs_reset
master:drivers/pinctrl/qcom/pinctrl-msm8998.c:#define UFS_RESET(pg_name, offset) \
master:drivers/pinctrl/qcom/pinctrl-msm8998.c: PINCTRL_PIN(153, "UFS_RESET"),
master:drivers/pinctrl/qcom/pinctrl-msm8998.c:static const unsigned int ufs_reset_pins[] = { 153 };
master:drivers/pinctrl/qcom/pinctrl-msm8998.c: UFS_RESET(ufs_reset, 0x19d000),
master:drivers/pinctrl/qcom/pinctrl-qcs404.c:#define UFS_RESET(pg_name, offset) \
master:drivers/pinctrl/qcom/pinctrl-sdm845.c:#define UFS_RESET(pg_name, offset) \
master:drivers/pinctrl/qcom/pinctrl-sdm845.c: PINCTRL_PIN(153, "UFS_RESET"),
master:drivers/pinctrl/qcom/pinctrl-sdm845.c:static const unsigned int ufs_reset_pins[] = { 153 };
master:drivers/pinctrl/qcom/pinctrl-sdm845.c: UFS_RESET(ufs_reset, 0x99f000),
I need to find the way to make Linux tickle/toggle the ufs_reset pin.
Regards.
