Quoting Lina Iyer (2018-09-04 14:09:34) > On Mon, Aug 27 2018 at 14:01 -0600, Stephen Boyd wrote: > > > >Can't we just configure a different chained IRQ handler with > >irq_set_chained_handler_and_data() for each of the GPIO IRQs that are > >handled by PDC to be the interrupts provide by the PDC irq controller > >that match the GPIOs? And then set their parent irq with > >irq_set_parent() for completeness? And also move those GPIOs from the > >existing msm_gpio irqchip to a different PDC gpio irqchip that does > >nothing besides push irqchip calls up to the PDC irqchip? Then we don't > >even have to think about resending anything and we can rely on PDC to do > >all the interrupt sensing all the time but still provide the irqs from > >the GPIO controller. > > > Seems like the irqchips need to be in hierarchy for this to work, which > is not the case with TLMM and the PDC, currently. > Why? Does something mandate that the chained irq is also the hierarchical parent irqchip?
