Re: [PATCH v3 3/4] i2c: qup: Correct duty cycle for FM and FM+

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, May 10, 2018 at 10:13:56AM -0600, Austin Christ wrote:
> The I2C spec UM10204 Rev. 6 specifies the following timings.
> 
>            Standard      Fast Mode     Fast Mode Plus
> SCL low    4.7us         1.3us         0.5us
> SCL high   4.0us         0.6us         0.26us
> 
> This results in a 33%/66% duty cycle as opposed to the 50%/50% duty cycle
> used for Standard-mode.
> 
> Add High Time Divider settings to correct duty cycle for FM(400kHz) and
> FM+(1MHz).
> 
> Signed-off-by: Austin Christ <austinwc@xxxxxxxxxxxxxx>
> Reviewed-by: Sricharan R <sricharan@xxxxxxxxxxxxxx>
> ---

Looks good to me.

Reviewed-by: Andy Gross <andy.gross@xxxxxxxxxx>
--
To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html



[Index of Archives]     [Linux ARM Kernel]     [Linux ARM]     [Linux Omap]     [Fedora ARM]     [Linux for Sparc]     [IETF Annouce]     [Security]     [Bugtraq]     [Linux MIPS]     [ECOS]     [Asterisk Internet PBX]     [Linux API]

  Powered by Linux