On Montag, 26. März 2018 14:44:52 CEST Sven Eckelmann wrote:
> I have here a board (IPQ4019 based) which requires an GPIO set to output + low
> to enable the USB. This should be defined via the DTS and thus a gpio-hog
> seemed to be appropriate in the tlmm:
>
> &tlmm {
> serial_pins: serial_pinmux {
> mux {
> pins = "gpio16", "gpio17";
> function = "blsp_uart0";
> bias-disable;
> };
> };
>
> spi_0_pins: spi_0_pinmux {
> pin {
> function = "blsp_spi0";
> pins = "gpio13", "gpio14", "gpio15";
> drive-strength = <12>;
> bias-disable;
> };
> pin_cs {
> function = "gpio";
> pins = "gpio12";
> drive-strength = <2>;
> bias-disable;
> output-high;
> };
> };
>
> enable-usb-power {
> gpio-hog;
> gpios = <58 GPIO_ACTIVE_LOW>;
> output-low;
> line-name = "enable USB2 power";
> };
> };
>
> But this seems to be incompatible with the general design because it now kills
> the bootup completely.
> [...]
> [ 1.298883] requesting hog GPIO enable USB2 power (chip 1000000.pinctrl, offset 58) failed, -517
> [ 1.299609] gpiochip_add_data: GPIOs 0..99 (1000000.pinctrl) failed to register
> [ 1.308589] ipq4019-pinctrl 1000000.pinctrl: Failed register gpiochip
> [ 1.316586] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe
> [ 1.322415] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferri
>
> What is the correct way for qcom,ipq4019-pinctrl to configure a pin during
> bootup (gpio-hog)? I can use the deprecated gpio sysfs infrastructure for
> now but this seems to be only a dirty hack.
>
I found the bug/issue and it's sort of specific to OF, pinctrl and gpio-hog.
However I do think that all pinctrl drivers are affect that call
gpiochip_add_pin_range() *after* (devm_)gpiochip_add_data().
According to:
<https://elixir.bootlin.com/linux/v4.16-rc7/ident/gpiochip_add_pin_range>
This seems to be quite a lot actually:
(pinctrl-baytrail, pinctrl-cherryview, pinctrl-intel, not sure if Intel
really is affected. I know there's at least one x86 with OF. But I don't
know if it has a pinctrl. @Andy?)
pinctrl-mt7622, pinctrl-mtk-common.c, pinctrl-abx500.c, pinctrl-msm.c,
pinctrl-as3722.c, pinctrl-at91-pio4.c, pinctrl-axp209.c, pinctrl-coh901.c,
pinctrl-digicolor.c, pinctrl-pistachio.c, pinctrl-sx150x.c
For ipq4019 (and all the others too?), there is this an workaround
that can be done:
Add the gpio-ranges property to the pinctrl node in the qcom-ipq4019.dtsi:
tlmm: pinctrl@1000000 {
gpio-ranges = <&tlmm 0 0 99>;
};
and remove the gpiochip_add_pin_range() call in:
<https://elixir.bootlin.com/linux/v4.16-rc7/source/drivers/pinctrl/qcom/pinctrl-msm.c#L834>
This will fix the issue of the missing pin ranges, since the ranges
are now being added by of_gpiochip_add_pin_range()
<https://elixir.bootlin.com/linux/v4.16-rc7/source/drivers/gpio/gpiolib-of.c#L618>
which is called before of_gpiochip_scan_gpios() in the same function.
<https://elixir.bootlin.com/linux/v4.16-rc7/source/drivers/gpio/gpiolib-of.c#L629>
[for reference: of_gpiochip_scan_gpios() is doing the the gpio-hog setup for OF.
<https://elixir.bootlin.com/linux/v4.16-rc7/source/drivers/gpio/gpiolib-of.c#L372>]
Regards,
Christian
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