On Wed, 19 Jul 2017 17:17:57 +0530 Abhishek Sahu <absahu@xxxxxxxxxxxxxx> wrote: > The memset in clear_read_regs is overhead. All the register data > will be filled by DMA during NAND operation so making these > register variables zero is not required. > Applied. Thanks, Boris > Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx> > --- > drivers/mtd/nand/qcom_nandc.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c > index 5b71478..7ecd0f8 100644 > --- a/drivers/mtd/nand/qcom_nandc.c > +++ b/drivers/mtd/nand/qcom_nandc.c > @@ -826,8 +826,6 @@ static void free_descs(struct qcom_nand_controller *nandc) > static void clear_read_regs(struct qcom_nand_controller *nandc) > { > nandc->reg_read_pos = 0; > - memset(nandc->reg_read_buf, 0, > - MAX_REG_RD * sizeof(*nandc->reg_read_buf)); > } > > static void pre_command(struct qcom_nand_host *host, int command) -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html