Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

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On 01/18, Bjorn Andersson wrote:
> On Tue 17 Jan 22:54 PST 2017, Vivek Gautam wrote:
> > On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote:
> > > On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote:
> [..]
> > > > +		reset-names = "phy", "common", "cfg",
> > > > +				"lane0", "lane1", "lane2";
> > > Each lane has a separate clock, separate reset.. why not create sub-nodes for
> > > each lane?
> > 
> > Yes, each lane has separate pipe clock and resets.
> > I can have a binding such as written below.
> 
> +1
> 
> > Does it makes sense to pull in the tx, rx and pcs offsets as well
> > to the child node, and iomap the entire address space of the phy ?
> > 
> 
> Note that you don't have to follow the same structure in your device
> driver as you describe your hardware in devicetree.
> 
> I would suggest that you replace the lane-offset and various lane
> specific resources with subnodes, but keep the driver "as is".
> 

Didn't we already move away from subnodes for lanes in an earlier
revision of these patches? I seem to recall we did that because
lanes are not devices and the whole "phy as a bus" concept not
making sense.

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