Qualcomm SM8450 platform can (and should) be using DMA for the PCIe EP
transfers. Extend the MMIO regions and interrupts in order to acommodate
for the DMA resources, mark iommus property as required for the
platform.
Upstream DT doesn't provide support for the EP mode of the PCIe
controller, so while this is an ABI break, it doesn't break any of the
supported platforms.
Fixes: 63e445b746aa ("dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC")
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index 6075361348352bb8d607acecc76189e28b03dc5b..d22022ff2760c5aa84d31e3c719dd4b63adbb4cf 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
@@ -176,9 +176,11 @@ allOf:
then:
properties:
reg:
- maxItems: 6
+ minItems: 7
+ maxItems: 7
reg-names:
- maxItems: 6
+ minItems: 7
+ maxItems: 7
clocks:
items:
- description: PCIe Auxiliary clock
@@ -200,9 +202,13 @@ allOf:
- const: ddrss_sf_tbu
- const: aggre_noc_axi
interrupts:
- maxItems: 2
+ minItems: 3
+ maxItems: 3
interrupt-names:
- maxItems: 2
+ minItems: 3
+ maxItems: 3
+ required:
+ - iommus
- if:
properties:
--
2.39.5
