Update the incomplete SM8450 support and bring in SAR2130P support for the PCIe1 controller to be used in EP mode. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- Changes in v3: - Rephrased commit messages, adding notes regarding ABI breaks (Krzysztof) - Added missing minTems (Krzysztof) - Reworked schema, merging reg/-names and interrupts/-names to a single conditional clause. - Added dma-coherent to the list of allowed properties. - Link to v2: https://lore.kernel.org/r/20250221-sar2130p-pci-v2-0-cc87590ffbeb@xxxxxxxxxx Changes in v2: - Rephrase IOMMU commit message to stop mentioning eDMA (Mani) - Explain why it is impossible to use fallback compatibles (Mani) - Reformat names to vertical lists (Konrad) - Use ACTIVE_ONLY for cpu-pcie interconnect (Konrad) - Use tags for sm8450 interconnects (Konrad) - Link to v1: https://lore.kernel.org/r/20250217-sar2130p-pci-v1-0-94b20ec70a14@xxxxxxxxxx --- Dmitry Baryshkov (8): dt-bindings: PCI: qcom-ep: describe optional dma-coherent property dt-bindings: PCI: qcom-ep: describe optional IOMMU dt-bindings: PCI: qcom-ep: enable DMA for SM8450 dt-bindings: PCI: qcom-ep: consolidate DMA vs non-DMA usecases dt-bindings: PCI: qcom-ep: add SAR2130P compatible PCI: dwc: pcie-qcom-ep: enable EP support for SAR2130P arm64: dts: qcom: sar2130p: add PCIe EP device nodes arm64: dts: qcom: sm8450: add PCIe EP device nodes .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 100 +++++++++++++++------ arch/arm64/boot/dts/qcom/sar2130p.dtsi | 61 +++++++++++++ arch/arm64/boot/dts/qcom/sm8450.dtsi | 62 +++++++++++++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 4 files changed, 198 insertions(+), 26 deletions(-) --- base-commit: 6b063ae40049a93bc662cb0c1653a691424b11a1 change-id: 20241017-sar2130p-pci-80dae35a67e8 Best regards, -- Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
