Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
rates used in lane equalization procedure.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index a36076e3c56b..6a2074297030 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
phys = <&pcie6a_phy>;
phy-names = "pciephy";
+ eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
+
+ eq-presets-16gts = /bits/ 8 <0x55 0x55>;
+
status = "disabled";
};
@@ -3115,6 +3119,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
phys = <&pcie5_phy>;
phy-names = "pciephy";
+ eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
+
status = "disabled";
};
@@ -3235,6 +3241,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
phys = <&pcie4_phy>;
phy-names = "pciephy";
+ eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
+
status = "disabled";
pcie4_port0: pcie@0 {
--
2.34.1
