Hi Dmitry, On Mon, Oct 14, 2024 at 3:55 PM Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> wrote: > Follow the ARM64 platform and implement simple cache information driver. > As it reads data from CTR (ARMv6+) and CLIDR (ARMv7+) registers, it is > limited to the ARMv7 / ARMv7M, providing simple fallback or just > returning -EOPNOTSUPP in case of older platforms. > > In theory we should be able to skip CLIDR reading and assume that Dcache > and Icache (or unified L1 cache) always exist if CTR is supported and > returns sensible value. However I think this better be handled by the > maintainers of corresponding platforms. > > Other than just providing information to the userspace, this patchset is > required in order to implement L2 cache driver (and in the end CPU > frequency scaling) on ARMv7-based Qualcomm devices. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> I added my review tags to the v2 patches, can you put them into Russell's patch tracker? Yours, Linus Walleij
