On Mon, Oct 14, 2024 at 3:56 PM Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> wrote: > On ARMv7 / v7m machines read CTR and CLIDR registers to provide > information regarding the cache topology. Earlier machines should > describe full cache topology in the device tree. > > Note, this follows the ARM64 cacheinfo support and provides only minimal > support required to bootstrap cache info. All useful properties should > be decribed in Device Tree. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> It's really neat actually! Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Yours, Linus Walleij
