On Mon, Oct 21, 2024 at 10:22:00PM +0200, Gabor Juhos wrote:
> Since both the 'alpha' and 'alpha_hi' members of the configuration is
> initialized (the latter is implicitly) with zero values, the output
> rate of the PLL will be the same whether alpha mode is enabled or not.
>
> Remove the initialization of the alpha* members to make it clear that
> the alpha mode is not required to get the desired output rate.
>
> No functional changes intended, compile tested only.
>
> Signed-off-by: Gabor Juhos <j4g8y7@xxxxxxxxx>
> ---
> drivers/clk/qcom/dispcc-qcm2290.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
> index 449ffea2295d3760f40abe8b1195e9022f46a9b0..d7bb1399e1022afc68e45ee335d615d4a5be5add 100644
> --- a/drivers/clk/qcom/dispcc-qcm2290.c
> +++ b/drivers/clk/qcom/dispcc-qcm2290.c
> @@ -40,8 +40,6 @@ static const struct pll_vco spark_vco[] = {
> /* 768MHz configuration */
> static const struct alpha_pll_config disp_cc_pll0_config = {
> .l = 0x28,
> - .alpha = 0x0,
> - .alpha_en_mask = BIT(24),
NAK, this pll isn't fixed rate.
> .vco_val = 0x2 << 20,
> .vco_mask = GENMASK(21, 20),
> .main_output_mask = BIT(0),
>
> --
> 2.47.0
>
--
With best wishes
Dmitry
