I only read back the SMMU config on X1E & 7280, but I have it on good
authority that this concerns all RPMh SoCs. Sending as RFC just in case.
Lacking coherency can hurt performance, but claiming coherency where it's
absent would lead to a kaboom.
Signed-off-by: Konrad Dybcio <quic_kdybcio@xxxxxxxxxxx>
---
Konrad Dybcio (11):
arm64: dts: qcom: qdu1000: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sc7180: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sc8180x: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sc8280xp: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sdm670: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sm6350: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sm8150: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sm8350: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: sm8450: Affirm IDR0.CCTW on apps_smmu
arm64: dts: qcom: x1e80100: Affirm IDR0.CCTW on apps_smmu
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 1 +
arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 +
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 ++
11 files changed, 12 insertions(+), 1 deletion(-)
---
base-commit: 55bcd2e0d04c1171d382badef1def1fd04ef66c5
change-id: 20240919-topic-apps_smmu_coherent-070f38a2c207
Best regards,
--
Konrad Dybcio <quic_kdybcio@xxxxxxxxxxx>
