Quoting Bryan O'Donoghue (2024-08-23 05:58:56) > Per Stephen Boyd's explanation in the link below, QUP RCG clocks do not > need to be parked when switching frequency. A side-effect in parking to a > lower frequency can be a momentary invalid clock driven on an in-use serial > peripheral. > > This can cause "junk" to spewed out of a UART as a low-impact example. On > the x1e80100-crd this serial port junk can be observed on linux-next. > > Apply a similar fix to the x1e80100 Global Clock controller to remediate. > > Link: https://lore.kernel.org/all/20240819233628.2074654-3-swboyd@xxxxxxxxxxxx/ > Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") > Fixes: 929c75d57566 ("clk: qcom: gcc-sm8550: Mark RCGs shared where applicable") > Suggested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> > --- Applied to clk-fixes
