On 26/08/2024 14:44, Konrad Dybcio wrote:
On 23.08.2024 2:58 PM, Bryan O'Donoghue wrote:
Per Stephen Boyd's explanation in the link below, QUP RCG clocks do not
need to be parked when switching frequency. A side-effect in parking to a
lower frequency can be a momentary invalid clock driven on an in-use serial
peripheral.
This can cause "junk" to spewed out of a UART as a low-impact example. On
the x1e80100-crd this serial port junk can be observed on linux-next.
Apply a similar fix to the x1e80100 Global Clock controller to remediate.
Link: https://lore.kernel.org/all/20240819233628.2074654-3-swboyd@xxxxxxxxxxxx/
Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100")
Fixes: 929c75d57566 ("clk: qcom: gcc-sm8550: Mark RCGs shared where applicable")
Suggested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
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I ran into some junk on the x1e80100 serial port and asked around to see if
someone had already found and fixed.
Neil pointed me at Stephen's fix for sm8550 which I found is also required
to fix the same thing x1e80100.
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Reviewed-by: Konrad Dybcio <konradybcio@xxxxxxxxxx>
Mind also fixing up 8650 that seems to have this issue?
Konrad
np
