On Tue, Aug 20, 2024 at 10:02:44PM +0800, Luo Jie wrote: > The CMN PLL hardware block is available in the Qualcomm IPQ SoC such > as IPQ9574 and IPQ5332. It provides fixed rate output clocks to Ethernet > related hardware blocks such as external Ethernet PHY or switch. This > driver is initially being enabled for IPQ9574. All boards based on > IPQ9574 SoC will require to include this driver in the build. > > This CMN PLL hardware block does not provide any other specific function > on the IPQ SoC other than enabling output clocks to Ethernet related > devices. > > Signed-off-by: Luo Jie <quic_luoj@xxxxxxxxxxx> > --- > arch/arm64/configs/defconfig | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
